Delay Reduced 4 Bit Reversible Arithmetic Logic Units
نویسندگان
چکیده
منابع مشابه
Design of a 4-bit 2’s Complement Reversible Circuit for Arithmetic Logic Unit Applications
Nowadays reversible circuit designing is the emerging area of research. This design strategy aims towards the formation of digital circuits with ideally zero power dissipation. In this paper we have proposed a new reversible logic module to design a 4-bit binary 2‟s complement circuit. This complement circuit using reversible logic can be used to design other low loss Arithmetic circuit. Propos...
متن کاملReversible arithmetic logic unit
Quantum computer requires quantum arithmetic. The sophisticated design of a reversible arithmetic logic unit (reversible ALU) for quantum arithmetic has been investigated in this letter. We provide explicit construction of reversible ALU effecting basic arithmetic operations. By provided the corresponding control unit, the proposed reversible ALU can combine the classical arithmetic and logic o...
متن کاملEfficient Algorithms for Optimal 4-Bit Reversible Logic System Synthesis
Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates...
متن کامل4 Bit Comparator Design Based on Reversible Logic Gates
Today, reversible logic circuits has attracted considerable attention in improving some fields like nanotechnology, quantum computing, and low power design. In this paper 4 bit reversible comparator based on classical logic circuit is represented which uses existing reversible gates. In this design we try to reduce optimization parameters like number of constant inputs, garbage outputs, and qua...
متن کاملDesign and Simulation of a 2GHz, 64×64 bit Arithmetic Logic Unit in 130nm CMOS Technology
The purpose of this paper is to design a 64×64 bit low power, low delay and high speed Arithmetic Logic Unit (ALU). Arithmetic Logic Unit performs arithmetic operation like addition, multiplication. Adders play important role in ALU. For designing adder, the combination of carry lookahead adder and carry select adder, also add-one circuit have been used to achieve high speed and low area. In mu...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2017
ISSN: 0975-8887
DOI: 10.5120/ijca2017915467